1 /* Automatically generated header! Do not edit! */ 2 3 #ifndef _PPCINLINE_OPENPCI_H 4 #define _PPCINLINE_OPENPCI_H 5 6 #ifndef __PPCINLINE_MACROS_H 7 #include <ppcinline/macros.h> 8 #endif /* !__PPCINLINE_MACROS_H */ 9 10 #ifndef OPENPCI_BASE_NAME 11 #define OPENPCI_BASE_NAME OpenPciBase 12 #endif /* !OPENPCI_BASE_NAME */ 13 14 #define pci_bus() \ 15 LP0(30, unsigned short , pci_bus, \ 16 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 17 18 #define pci_write_config_byte(__p0, __p1, __p2) \ 19 LP3NR(126, pci_write_config_byte, \ 20 unsigned char , __p0, d0, \ 21 unsigned char , __p1, d1, \ 22 struct pci_dev *, __p2, a0, \ 23 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 24 25 #define pci_outb(__p0, __p1) \ 26 LP2NR(42, pci_outb, \ 27 unsigned char , __p0, d0, \ 28 unsigned long , __p1, a0, \ 29 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 30 31 #define pci_outl(__p0, __p1) \ 32 LP2NR(66, pci_outl, \ 33 unsigned long , __p0, d0, \ 34 unsigned long , __p1, a0, \ 35 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 36 37 #define pci_add_intserver(__p0, __p1) \ 38 LP2(150, BOOL , pci_add_intserver, \ 39 struct Interrupt *, __p0, a0, \ 40 struct pci_dev *, __p1, a1, \ 41 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 42 43 #define pci_outw(__p0, __p1) \ 44 LP2NR(54, pci_outw, \ 45 unsigned short , __p0, d0, \ 46 unsigned long , __p1, a0, \ 47 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 48 49 #define pci_write_config_word(__p0, __p1, __p2) \ 50 LP3NR(132, pci_write_config_word, \ 51 unsigned char , __p0, d0, \ 52 unsigned short , __p1, d1, \ 53 struct pci_dev *, __p2, a0, \ 54 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 55 56 #define pci_read_config_long(__p0, __p1) \ 57 LP2(120, unsigned long , pci_read_config_long, \ 58 unsigned char , __p0, d0, \ 59 struct pci_dev *, __p1, a0, \ 60 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 61 62 #define pci_to_hostcpy(__p0, __p1, __p2) \ 63 LP3NR(72, pci_to_hostcpy, \ 64 void *, __p0, a0, \ 65 void *, __p1, a1, \ 66 unsigned long , __p2, d0, \ 67 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 68 69 #define pci_find_device(__p0, __p1, __p2) \ 70 LP3(90, struct pci_dev *, pci_find_device, \ 71 unsigned short , __p0, d0, \ 72 unsigned short , __p1, d1, \ 73 struct pci_dev *, __p2, a0, \ 74 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 75 76 #define pci_freedma_mem(__p0, __p1) \ 77 LP2NR(168, pci_freedma_mem, \ 78 APTR , __p0, a0, \ 79 unsigned long , __p1, d0, \ 80 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 81 82 #define pci_find_class(__p0, __p1) \ 83 LP2(96, struct pci_dev *, pci_find_class, \ 84 unsigned long , __p0, d0, \ 85 struct pci_dev *, __p1, a0, \ 86 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 87 88 #define pci_rem_intserver(__p0, __p1) \ 89 LP2NR(156, pci_rem_intserver, \ 90 struct Interrupt *, __p0, a0, \ 91 struct pci_dev *, __p1, a1, \ 92 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 93 94 #define host_to_pcicpy(__p0, __p1, __p2) \ 95 LP3NR(78, host_to_pcicpy, \ 96 void *, __p0, a0, \ 97 void *, __p1, a1, \ 98 unsigned long , __p2, d0, \ 99 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 100 101 #define pci_logic_to_physic_addr(__p0, __p1) \ 102 LP2(174, APTR , pci_logic_to_physic_addr, \ 103 APTR , __p0, a0, \ 104 struct pci_dev *, __p1, a1, \ 105 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 106 107 #define pci_allocdma_mem(__p0, __p1) \ 108 LP2(162, APTR , pci_allocdma_mem, \ 109 unsigned long , __p0, d0, \ 110 unsigned long , __p1, d1, \ 111 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 112 113 #define pci_write_config_long(__p0, __p1, __p2) \ 114 LP3NR(138, pci_write_config_long, \ 115 unsigned char , __p0, d0, \ 116 unsigned long , __p1, d1, \ 117 struct pci_dev *, __p2, a0, \ 118 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 119 120 #define pci_to_pcicpy(__p0, __p1, __p2) \ 121 LP3NR(84, pci_to_pcicpy, \ 122 void *, __p0, a0, \ 123 void *, __p1, a1, \ 124 unsigned long , __p2, d0, \ 125 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 126 127 #define pci_read_config_byte(__p0, __p1) \ 128 LP2(108, unsigned char , pci_read_config_byte, \ 129 unsigned char , __p0, d0, \ 130 struct pci_dev *, __p1, a0, \ 131 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 132 133 #define pci_inb(__p0) \ 134 LP1(36, unsigned char , pci_inb, \ 135 unsigned long , __p0, a0, \ 136 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 137 138 #define pci_inl(__p0) \ 139 LP1(60, unsigned long , pci_inl, \ 140 unsigned long , __p0, a0, \ 141 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 142 143 #define pci_read_config_word(__p0, __p1) \ 144 LP2(114, unsigned short , pci_read_config_word, \ 145 unsigned char , __p0, d0, \ 146 struct pci_dev *, __p1, a0, \ 147 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 148 149 #define pci_inw(__p0) \ 150 LP1(48, unsigned short , pci_inw, \ 151 unsigned long , __p0, a0, \ 152 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 153 154 #define pci_set_master(__p0) \ 155 LP1(144, BOOL , pci_set_master, \ 156 struct pci_dev *, __p0, a0, \ 157 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 158 159 #define pci_find_slot(__p0, __p1) \ 160 LP2(102, struct pci_dev *, pci_find_slot, \ 161 unsigned char , __p0, d0, \ 162 unsigned long , __p1, d1, \ 163 , OPENPCI_BASE_NAME, 0, 0, 0, 0, 0, 0) 164 165 #endif /* !_PPCINLINE_OPENPCI_H */